A semiconductor device such as a semiconductor memory can include a memory cell region and a peripheral circuit region which controls memory cells, both within one chip. The memory cell region can be miniaturized so as to increase the capacity of a semiconductor memory. Interconnects leading out from the memory cell region can be miniaturized. Miniaturizing the interconnects of the memory cell region can cause an increase in resistances of the interconnects, a delay in the transfer of data and control signals, and an increase in heat generation due to the interconnect resistances. To suppress such an increase in interconnect resistances, a metal having a short electron mean free path can be used. In this case, however, a problem can arise that the resistance of a relatively thick interconnect leading out from the peripheral circuit region increases.
Furthermore, different interconnect materials between the memory cell region and the peripheral circuit region can be used. In such a case, however, it may be necessary to repeatedly execute lithography steps and etching steps in order to form interconnects in the memory cell region and peripheral circuit region, respectively. As a result, manufacturing costs can increase.